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Most of you don't know me, so I will briefly introduce myself.
My name is sami and I hate the Xilinx xtremedsp kit. So I will take a bit of time to explain why. I started my masters in January in Telecommunication and Signal Processing and I have been forced to use an old FPGA board with basically outdated programs (limited licenses and such) but the previous student (5 years ago at the very least) created this great platform for the FPGA that can save me hours of work!
So I did what any researcher would do, and I started to beg Xilinx (the company making the FPGA board) to give me their new solutions(programs) for free and lucky me they had a university donation program and I was accepted YAY! Now I was all excited and started downloading the programs and try out the old master students platform and wow... nothing works (FUCK).
But why do you ask? Because the platform he created is using the old programs modules and they updated the new modules in the new solutions.
Basically, now I don't have a working platform and everything sucks balls. If anybody has worked with any Xilinx crap PLEASE help me.
 I'm a sad sad panda
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talk to rich, he speaks tech.
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I don't know if R1CH speaks FPGA tech if he does I will love him forever
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I know some people...that have had bad experiences with Xilinx. As for me, I've managed to stay away from the actual implementation side of things for research and class. I wish I could help you, but unfortunately (fortunately for me?) I can't. Good luck. -_-;;;
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People complain about everything, from Xilinx to Altera. Would it be too much work to rewrite everything from the old platform using the new modules?
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LOL! goooooddddddd luck!
Yea, we used a Xilinx Virtex-5 board for our school's (UC Berkeley) Digital Design class and oh god, I have so much hate for the class and FPGAs in general....
The bad news is you probably will have to go through all of the old student's verilog/vhdl and figure out exactly what's going on and what you need to do to update them to the correct modules.
The good news is....
wait! there's only more bad news!
...waiting ~20 minutes for map and par every single time you made a silly mistake/change
...getting a load of re-mapped garbage instead of the circuit you intended when you want to debug timing errors
...tools randomly dying and not saving any of your project files
...getting 80% of your modules pruned away, with the tools "claiming" they're never used
...getting multiple clocks to actually work on chip
...interfacing with off chip components that are oh so poorly documented
...etc, etc.
seriously, good luck. god i hated that class.
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Hmm that's fantastic, hey phase do you still have your old notes by any chance? It would be great if you did.
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Canada3442 Posts
lol Xilinx, glad I'm done with this
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I was in phase's class too.... life was not good especially when the exact same code can produce both working and non-working circuits depending on your place & route options or just.... different place & route runs.. yup.. happened to me all the time.... have code... par it... crap it doesnt work... grr.. par it again with no changes.. wtf it works now?!
I think you just have to rely on Xilinx documentations for their modules and hopefully the old student left some documentations for his modules?
Our notes are all here.. http://inst.eecs.berkeley.edu/~cs150/sp10/documents.php
Which board are you using? Virtext? Spartan?
Hope that helps >_<
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I'm using the Virtex-II (OLD model) but it's from the xtremeDSP kit (with Nallatech).
But apparently it should be easier for me to work with it since all I have to do is work with system generator which let's you use matlab/simulink and it will create the bitstream or HDL files for your board and all I have to do is just configure the board with it and hopefully everything works out  .
The problem is that the documentation is ancient and the guy working on it previously actually took some workshops from xilinx to understand how it works which made his life easier I guess. I mean I have all the stuff he used, it's just I have to learn everything myself which sucks balls since I don't really remember some stuff.
For example, I know what a LUT / multiplexer and so on is but I don't remember what a slice is and so on but that can be easily remembered after a couple of google searches
I'm actually suppose to build a sort of modem out of this fpga which right now I feel like it will be crazy to actually even think about it lol. Anyways, thanks for all your help guys, I really really appreciate it.
Also, I'll be using VHDL because I'm used to it but it shouldn't really matter I think. thanks again
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EPT
